Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More MIPS released its P8700 CPU based on the RISC-V computing architecture to ...
Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More Synopsys announced its plans for expanding its processor intellectual ...
TOKYO--(BUSINESS WIRE)--Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, announced today that it has designed and tested a 32-bit CPU core based on ...
Hangzhou, China, Jan. 29, 2026 (GLOBE NEWSWIRE) -- As the global technology industry accelerates its shift toward open architectures and on-device artificial intelligence, Chinese RISC-V chip company ...
The ARM926EJ-S™ processor features a Jazelle® technology enhanced 32-bit RISC CPU, flexible size instruction and data caches, tightly coupled memory (TCM) interfaces and memory management unit (MMU).
A group of prominent chipmakers is forming a new venture to broaden the adoption of the RISC-V processor architecture. The venture, which was unveiled by its backers this morning, will initially focus ...
ECARX launched its RISC-V-based EXP01 processor and outlined its automotive-grade MCU roadmap at the RISC-V Summit Europe 2025. ECARX Holdings Inc., a global mobility tech provider, introduced its ...
Click to share on X (Opens in new window) X Click to share on Facebook (Opens in new window) Facebook Chinese RISC-V CPU startup Spacemit recently completed a Series A funding round of several hundred ...
The RISC-V CPU architecture currently accounts for under 1% of the world’s processor market, but that is going to change rapidly over the next years as its parallel processing is perfectly suited to ...
The new SiFive Performance P870-D continues the journey for the company from its regular P870, which had a six-wide out-of-order core with an RVA23 profile of the RISC-V instruction set architecture ...
Andes Technology Corp. has launched a functional safety RISC-V processor, the AndesCore D45-SE, with ISO 26262 Automotive Safety Integrity Level D (ASIL-D) certification. The processor addresses a ...
[RetroBytes] nicely presents the curious history of the SPARC processor architecture. SPARC, short for Scalable Processor Architecture, defined some of the most commercially successful RISC processors ...
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